Cascode Bias
Understanding Cascode Bias
Biasing Stacked Transistors
A cascode amplifier is a classic two-transistor configuration where a common-source (or common-emitter) transistor is stacked in series with a common-gate (or common-base) transistor. This structure is highly valued in RF design because it eliminates the Miller effect, increases output impedance, and improves input-to-output isolation. However, biasing a cascode amplifier is more complex than biasing a single transistor because the supply voltage must be shared across the series stack.
The cascode bias network must establish independent gate-source voltages for both transistors. The lower transistor acts as the primary transconductance element, controlling the drain current. The upper transistor acts as a current buffer, shielding the lower transistor's drain from voltage swings. To maintain high gain and linearity, both devices must be biased to remain in their active or saturation regions under all RF drive conditions.
Biasing Topologies and Temperature Stability
Several biasing techniques are used for cascode configurations. In integrated circuit (IC) designs, active biasing using current mirrors is the standard method, providing excellent stability against process and temperature variations. For discrete circuits, a resistive voltage divider network is commonly used, where a tap point establishes the gate voltage of the upper transistor. The gate of the upper transistor must be RF-grounded using a bypass capacitor to maintain the common-gate configuration, preventing RF signals from modulating the bias voltage.
Key Mathematical Relations
Technical Specifications Comparison
| Biasing Topology | Voltage Headroom Required | Temperature Stability | Component Count | RF Bypass Requirements |
|---|---|---|---|---|
| Resistive Divider | Low (passive divider) | Poor (sensitive to Vth drift) | Low (3 to 4 resistors) | Critical at common-gate node |
| Active Current Mirror | Moderate (requires mirror overhead) | Excellent (tracks device changes) | High (uses mirror transistors) | Requires decoupling on bias lines |
| Self-Biased Cascade | High (source resistor drops voltage) | Good | Medium | Requires source bypass capacitor |
Frequently Asked Questions
What are the main benefits of using a cascode amplifier?
A cascode amplifier suppresses the Miller effect by keeping the drain voltage of the input common-source transistor constant. This increases the bandwidth, provides very high input-to-output isolation, and increases the output impedance of the amplifier.
Why is biasing a cascode amplifier more complex than a single stage?
It is more complex because two transistors are stacked in series across the supply voltage. The designer must ensure that both transistors have adequate drain-source voltage to remain saturated, which reduces the available voltage headroom for the RF signal swing.
How do you optimize a cascode bias network for low voltage operation?
For low-voltage operation, designers use active biasing current mirrors with low saturation thresholds, or they use depletion-mode devices for the upper stage which naturally bias with lower gate-source voltage requirements, preserving headroom.