How many matching sections do I need for a wideband amplifier?

The Bode-Fano criterion sets the theoretical limit: for a given load Q and bandwidth, there is a minimum achievable return loss. A single-section L-network covers roughly 10 to 15 percent fractional bandwidth with 15 dB return loss. Two sections extend this to 25 to 40 percent. Three sections can reach an octave bandwidth. Beyond that, distributed matching (tapered lines, Klopfenstein tapers) or feedback topologies are needed. Each added section improves bandwidth but adds loss and physical size.

RF Design

Amplifier Design

Q: Should I design for minimum noise figure or maximum gain first?

For LNA design, always start with the noise match. The source impedance that gives minimum noise figure (gamma-opt from the datasheet) is almost never the same impedance that gives maximum gain (S11-conjugate). You must choose: matching for minimum NF sacrifices 1 to 3 dB of available gain. Since the Friis formula shows the first stage NF dominates the system, the noise match wins. You recover the lost gain with subsequent stages where NF no longer matters.

Q: When should I choose GaN over GaAs for a power amplifier?

GaN wins when you need high power density, wide bandwidth, or high supply voltage. A GaN HEMT operates at 28 to 50 V drain bias versus 5 to 12 V for GaAs pHEMT, which means fewer combining stages for a given output power. GaN also has 3 to 5 times higher power density per mm of gate periphery, enabling smaller die sizes. GaAs remains preferred for low-noise applications (NF below 0.5 dB) and for frequencies above 40 GHz where GaN technology is less mature.

Between the transistor datasheet and a working amplifier sits a design process that balances four competing objectives: gain, noise figure, linearity, and stability. No single matching network optimizes all four. Noise-optimal and gain-optimal source impedances are different points on the Smith Chart. Maximizing gain risks instability. Pushing output power degrades linearity. The RF amplifier designer's job is to navigate these trade-offs, choosing a bias point, synthesizing matching networks, verifying stability across all frequencies, and validating the design through EM simulation before committing to layout.

Category: RF Design

Key Tools: ADS, AWR, HFSS

Key Specs: Gain, NF, OIP3, P1dB, PAE

The 8-Step Design Flow

Whether you are designing a 0.5 dB noise figure LNA for a 5G base station or a 100 W GaN power amplifier for an X-band radar, the fundamental process is the same. The differences lie in which trade-offs you prioritize at each step.

Capture the specification: Define gain, bandwidth, NF (for LNAs), P1dB/OIP3 (for PAs), PAE, supply voltage, and interface impedances. Every design decision traces back to these numbers.
Select the transistor: For LNAs, minimize NF_min at the target frequency. For PAs, maximize P1dB and PAE at the required supply voltage. Check that S-parameter and nonlinear model files are available.
Set the bias point: Class A (50% I_DSS) for LNAs, Class AB (10 to 15% I_DSS) for linear PAs, Class B/C for efficiency-optimized PAs. The bias point determines gain, linearity, and efficiency simultaneously.
Verify stability: Plot stability circles from 100 MHz to 3× the operating frequency. Add stabilization resistors to achieve μ > 1 across the full range.
Synthesize matching networks: For LNAs, match the source to Γ_opt (noise match). For PAs, present the load-pull optimum impedance. Use the load stability circle to confirm the chosen impedance is in the stable region.
Design the bias network: Use quarter-wave stubs or high-impedance feed lines for RF isolation. Bypass capacitors must provide low impedance from DC to well above the operating frequency.
Simulate the complete circuit: Verify gain, NF, S-parameters, stability, and large-signal performance (IP3, P1dB, PAE) across temperature and supply voltage corners.
EM-verify the layout: Run full-wave EM simulation (Momentum, Sonnet, HFSS) on the matching networks and bias feeds. Parasitic coupling between input and output traces can destroy stability margin.

LNA vs. PA: Where the Design Diverges

Design Aspect	LNA (Low-Noise)	PA (Power)
Primary goal	Minimize noise figure	Maximize output power & PAE
Source match	Γ_opt (noise match)	50 Ω or driver output Z
Load match	Conjugate match for gain	Load-pull optimum for P1dB/PAE
Bias class	Class A (50% I_DSS)	Class AB (10-15% I_DSS)
Supply voltage	3 to 5 V	28 to 50 V (GaN)
Thermal	Minimal concern	Heat sink, via arrays, thermal modeling
Stability risk	Out-of-band oscillation	Odd-mode, parametric, low-freq

Common Mistakes That Kill First-Pass Yield

Stability checked only in-band: The transistor may have K < 1 at 200 MHz where its gain is 25 dB. Always simulate from 10 MHz to at least 3× f₀.
Ignoring bias network resonances: A bypass capacitor with a series resonance at the operating frequency creates a short to ground on the drain bias line. Use multiple capacitor values (100 pF + 10 nF + 1 μF) to cover the full frequency range.
EM effects in matching networks: A 90-degree stub at 28 GHz is 2.7 mm long. At this scale, coupling between traces, ground via spacing, and substrate mode launching all affect performance. Never skip the EM simulation.

Common Questions

Frequently Asked Questions

Should I design for minimum noise figure or maximum gain first?

For LNA design, always start with the noise match. The source impedance for minimum NF (Γ_opt) is almost never the conjugate of S₁₁. Matching for minimum NF typically sacrifices 1 to 3 dB of available gain. Since the Friis formula shows the first stage NF dominates the system, the noise match wins. Recover the lost gain with subsequent stages.

When should I choose GaN over GaAs for a power amplifier?

GaN wins when you need high power density (3 to 5× more W/mm than GaAs), wide bandwidth, or high supply voltage (28 to 50 V vs 5 to 12 V). GaAs remains preferred for noise figures below 0.5 dB and frequencies above 40 GHz where GaN technology is less mature.

How many matching sections do I need for wideband operation?

A single L-network covers 10 to 15% fractional bandwidth at 15 dB return loss. Two sections reach 25 to 40%. Three sections can achieve octave bandwidth. Beyond that, distributed matching (Klopfenstein tapers) or feedback topologies are needed. The Bode-Fano criterion sets the theoretical limit for a given load Q.

Related Terms

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