Why is bias sequencing important?

For depletion-mode FETs (GaAs pHEMT, GaN HEMT), the device conducts maximum current at zero gate voltage. If drain voltage is applied before the negative gate bias, the device draws maximum current, potentially exceeding its safe operating area and destroying it instantly. Correct sequence: apply negative gate bias first (to pinch off the channel), then apply drain voltage. Power-down sequence: remove drain first, then gate. For GaN PAs operating at 28 to 50 V drain, the energy involved in a sequencing failure is catastrophic. Bias sequencing circuits typically use voltage supervisors, enable pins on voltage regulators, and time delays (RC networks or digital controllers) to enforce the correct order. Some designs include current-limiting circuits as a safety backup. The gate bias supply must also have low noise (below 10 microvolts RMS) to avoid modulating the device's gain and contributing to AM-PM distortion.

How do bypass capacitors provide broadband decoupling?

A single bypass capacitor has a self-resonant frequency (SRF) above which it becomes inductive and loses its bypassing effectiveness. To provide broadband decoupling, multiple capacitors of different values are used in parallel: a large capacitor (10 to 100 microfarads tantalum) for low-frequency decoupling, a medium capacitor (100 nanofarads ceramic) for mid-frequencies, and a small capacitor (100 picofarads to 1 nanofarad ceramic) for RF frequencies. Each capacitor is effective near its SRF. The placement is critical: the smallest capacitor must be closest to the device pin, with the larger capacitors progressively further away. Via holes to the ground plane must be short (low inductance) to maintain effectiveness. At mmWave frequencies, even the via inductance matters: blind vias or multiple parallel vias are used to reduce the ground path inductance below 50 picohenries.

What is the RF choke design?

The RF choke (RFC) is an inductor in the bias path that presents high impedance at RF frequencies while passing DC current. The ideal RFC has infinite impedance at all RF frequencies and zero DC resistance. In practice, the choke must have its self-resonant frequency (SRF) above the operating frequency. A quarter-wave high-impedance transmission line stub (open-circuited at the end) can serve as an RFC at a single frequency, providing infinite impedance at the design frequency. For broadband operation, multiple chokes in series (each resonant at a different frequency) or a conical inductor (continuously varying pitch) provides wideband high impedance. Typical RFC values: 10 to 100 nanohenries for microwave (1 to 18 GHz), 100 nanohenries to 10 microhenries for VHF/UHF, and 10 to 1000 microhenries for HF. The RFC must also handle the DC current without saturation.

Circuit Design

Bias Network

/bye-us net-werk/

Delivers DC to active RF devices with RF isolation. RF choke: high Z at RF, low R at DC (SRF > f_op). DC block: series cap passes RF, blocks DC. Bypass: multi-value caps (100pF + 100nF + 10μF) for broadband decoupling. Sequencing: gate before drain (depletion FET) to prevent destruction. IL <0.1 dB. Isolation >30 dB. GaN: 28-50V drain, strict sequencing.

IL: <0.1 dB

ISO: >30 dB

Seq: V_g first

Understanding Bias Networks

The bias network is the unsung hero of RF circuit design. A poorly designed bias network causes oscillation, instability, gain variation, noise degradation, and even device destruction. Yet it receives far less design attention than the matching networks and active devices it supports.

The fundamental challenge is that DC and RF must coexist: the bias network must be transparent to DC current (low resistance path) while being invisible to RF signals (high impedance path). This requires careful selection of inductors, capacitors, and resistors whose impedances behave correctly at both DC and the operating RF frequency, often spanning multiple octaves.

Bias Network Components

Component	Function	Value Range	Critical Param	Placement
RF choke	Block RF, pass DC	10nH-1mH	SRF, I_sat	Bias feed
DC block cap	Pass RF, block DC	1pF-100nF	SRF, ESR	Signal path
Bypass cap (small)	RF ground	100pF-1nF	SRF, ESL	Nearest pin
Bypass cap (mid)	Mid-f decouple	10-100nF	ESR	Near device
Bypass cap (bulk)	Low-f decouple	10-100μF	ESR, ripple	Supply entry

Common Questions

Frequently Asked Questions

Sequencing?

Depletion FET: max current at V_g=0. Apply negative gate FIRST (pinch off), then drain. Reverse for power-down. GaN at 28-50V: catastrophic failure if wrong order. Use voltage supervisors, enable pins, RC delays. Gate noise <10μV RMS to avoid AM-PM distortion.

Bypass strategy?

Each cap has SRF: above it, becomes inductive. Multiple values in parallel: 100pF (RF, SRF~3GHz) + 100nF (mid, SRF~30MHz) + 10μF (bulk). Smallest closest to pin. Short vias to ground (<50pH). mmWave: blind vias or multiple parallel. Placement is everything.

RF choke?

|Z| > 10×Z₀ at f_op (>500Ω for 50Ω). SRF must exceed operating freq. λ/4 open stub: infinite Z at f₀, ~20% BW. Broadband: multiple series chokes at different SRFs or conical inductor. Must handle DC current without saturation.

Related Terms

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RF Circuits

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