BERT
Understanding BERT Instruments
The BERT is the definitive pass/fail instrument for digital communications. Whether qualifying a 400G optical transceiver, validating a satellite modem's demodulator, or characterizing a SerDes PHY on a next-generation SoC, the BERT provides the objective measurement: how many bits arrive incorrectly? Every digital RF link has a BER specification, and the BERT is how you prove compliance.
Modern BERTs have evolved far beyond simple error counting. Integrated jitter injection allows stress testing against specifications like IEEE 802.3 jitter tolerance masks. Eye diagram analysis reveals signal integrity issues (ISI, crosstalk, noise) that explain why errors occur. PAM4 capability supports the 400G/800G generation where each symbol carries 2 bits across 4 amplitude levels, requiring per-level BER measurement and TDECQ analysis.
Measurement Time Calculation
N = −ln(1 − C) / BERtarget
C = confidence level (0.95 for 95%)
Example: BER < 10−12, 95% confidence
N = −ln(0.05) / 10−12 = 3×1012 bits
At 10 Gbps: T = 300 seconds
At 100 Gbps: T = 30 seconds
At 400 Gbps: T = 7.5 seconds
BER Calculation:
BER = Eerrors / Ntotal
Confidence interval: Poisson (low error count)
or Normal approximation (high count)
PRBS Pattern Comparison
| Pattern | Length | Max Run | Application |
|---|---|---|---|
| PRBS-7 | 127 | 7 CID | Quick functional check |
| PRBS-9 | 511 | 9 CID | 10GBASE-T |
| PRBS-15 | 32,767 | 15 CID | SONET/SDH, ITU-T O.150 |
| PRBS-23 | 8.4M | 23 CID | 25G/50G/100G standard |
| PRBS-31 | 2.1G | 31 CID | 100GBASE-SR4+, max stress |
| SSPRQ | 8,191 sym | N/A | PAM4 400G/800G |
Frequently Asked Questions
How does BER measurement work?
PG generates PRBS via LFSR, drives DUT. ED recovers clock, syncs to pattern, counts mismatched bits. BER = errors/total. For 10−12 at 95%: need 3×1012 bits (300 s at 10 Gbps, 30 s at 100 Gbps).
Which PRBS pattern?
PRBS-7 for quick checks. PRBS-15 for SONET/SDH. PRBS-23 for 25G to 100G. PRBS-31 for max CDR/baseline stress (31 CID). SSPRQ for PAM4 400G/800G testing. Longer patterns stress more failure modes.
Key BERT specs?
Data rate (32 to 120+ Gbaud), PG jitter (<500 fs RMS), ED sensitivity (10 to 50 mVpp), rise time (5 to 15 ps), PAM4 support, jitter injection, CTLE/DFE equalization. Price: $50K to $500K.