Assembly Rule
Understanding Assembly Rules in RF PCB Design
A beautiful RF circuit board design that violates assembly rules will cause factory failures — components placed too close together will short during reflow, connectors placed too close to the board edge will be damaged during depaneling, and fiducials placed in the wrong location will cause the pick-and-place machine to misalign every component. Assembly rules prevent these manufacturing failures by imposing quantitative design constraints.
Critical Assembly Rules for RF Boards
RF assemblies must satisfy all standard DFA rules plus additional RF-specific constraints:
- Component spacing: ≥0.5mm between adjacent components for standard reflow; larger spacing around high-power components requiring heat sinking.
- Shield can rules: Ground pad arrays must be continuous around the can perimeter; component height inside the can must clear the can ceiling with margin.
- RF connector rules: Press-fit connector holes require ±25μm tolerance; SMA connector footprints require specific ground via patterns for impedance matching.
- Thermal rules: High-power PA transistors require thermal via arrays underneath the component, with specific via count and diameter requirements.
Key Equations
Assembly Rules (also called Design for Assembly rules, or DFA rules) in PCB manufacturing are a set of quantitative geometric and process constraints that the...
Key specifications:
0.5 mm | 25 μm | 0 dB | 1 mW | 30 dB | 1 W
Power: P(dBm) = 10log(PmW), 0dBm = 1mW
Comparison
| Aspect | Assembly Rule Spec | Typical Range | Impact | Design Note |
|---|---|---|---|---|
| Primary function | Assembly rules prevent these manufacturi... | Application-dep. | Critical | Verify in sim |
| Operating range | Shield can rules: Ground pad arrays must... | Application-dep. | Critical | Verify in sim |
| Performance | RF connector rules: Press-fit connector... | Application-dep. | Critical | Verify in sim |
| Integration | Thermal rules: High-power PA transistors... | Application-dep. | Critical | Verify in sim |
| Trade-off | See specification | Application-dep. | Critical | Verify in sim |
Frequently Asked Questions
Who defines assembly rules — the designer or the manufacturer?
Both. The EDA tool contains built-in DFA rule sets based on industry standards (IPC-7351 for component footprints, IPC-2221 for general PCB design). The contract manufacturer (CM) provides their specific assembly capability rules — minimum component spacing, maximum component height, supported package types, and panel size constraints. The designer must satisfy both the industry standard rules and their specific CM's capability rules.
What happens if assembly rules are violated?
Rule violations cause manufacturing defects: insufficient component spacing causes solder bridging (short circuits); missing fiducials cause global placement offset across all components; insufficient board-edge clearance causes component damage during depaneling. In high-volume production, even a small percentage of defects caused by assembly rule violations creates significant scrap cost and delivery delays.
How are assembly rules checked in EDA tools?
Modern EDA tools include automated DFA checking engines that run assembly rule checks against the layout, similar to how DRC (Design Rule Check) verifies electrical rules. These checks flag violations with specific error codes and locations. Some EDA tools integrate directly with contract manufacturer capability files, automatically checking the design against the specific CM's manufacturing constraints before generating output files.