Assembly Layer
Understanding Assembly Layers in PCB Design
Every layer in a PCB design tool serves a purpose. Signal layers carry RF traces. Power layers distribute DC power. But the assembly layers carry something equally important: the visual and textual information that tells a factory worker how to build the board correctly.
Standard Assembly Layer Content
Assembly layers typically contain:
- Component outlines: The physical footprint boundary of each component, showing exact size and position.
- Reference designators: Text labels (R1, C5, U3) matching the BOM, placed near each component for identification.
- Polarity marks: Dots, bars, or arrows indicating the correct orientation of polarized components (ICs pin 1, electrolytic capacitor polarity, diode cathode).
- Mechanical features: Mounting hole callouts, board outline with dimensions, and connector orientation indicators.
RF-Specific Assembly Layer Practices
RF designers add additional information to assembly layers that digital designers rarely need: shield can footprints with grounding pad arrays, transmission line impedance annotations for troubleshooting, phase-matched line group identifiers, and notes indicating which components are tuning-sensitive and must not be substituted during rework.
Key Equations
Assembly Layers in PCB design are non-electrical CAD layers within the EDA tool's layer stack that carry manufacturing and assembly documentation information — component outlines...
Key specifications:
0 dB | 1 mW | 30 dB | 1 W | 110 GHz | 50 dB
Power: P(dBm) = 10log(PmW), 0dBm = 1mW
Comparison
| Aspect | Assembly Layer Spec | Typical Range | Impact | Design Note |
|---|---|---|---|---|
| Primary function | These layers are not part of the physica... | Application-dep. | Critical | Verify in sim |
| Operating range | Understanding Assembly Layers in PCB Des... | Application-dep. | Critical | Verify in sim |
| Performance | Signal layers carry RF traces... | Application-dep. | Critical | Verify in sim |
| Integration | Power layers distribute DC power... | Application-dep. | Critical | Verify in sim |
| Trade-off | But the assembly layers carry something... | Application-dep. | Critical | Verify in sim |
Frequently Asked Questions
What is the difference between silkscreen and assembly layers?
The silkscreen layer is physically printed onto the PCB surface (using white or yellow ink) and is visible on the finished board. The assembly layer exists only in the CAD database and on the assembly drawing documentation — it is not printed on the physical board. Assembly layers can contain more detailed information (long text notes, detailed outlines) that would not fit in the limited space of a silkscreen print.
Do assembly layers affect the Gerber output?
Assembly layers are exported as separate Gerber files — they do not merge with or affect the fabrication Gerber files (copper, mask, drill). The PCB fabricator uses the fabrication Gerbers to build the bare board. The assembly house uses the assembly layer Gerbers (plus the pick-and-place centroid file and BOM) to populate the board with components.
How should RF shield can boundaries be documented?
Shield can boundaries should be placed on a dedicated assembly layer (not the silkscreen layer, which may interfere with the can's solder seal). The assembly layer should show: the can's physical outline, the ground pad array that must be soldered to the can perimeter, the component clearance zone inside the can (accounting for can wall thickness and solder fillet), and any ground via stitching pattern required underneath the can for RF isolation.