Why do RF designers make anti-pads larger than digital designers do?

Digital PCB designers usually set the anti-pad diameter to be just large enough to prevent the via plating from shorting to the ground plane, typically the drill diameter plus 10 to 15 mils. This maximizes ground plane continuity. However, an RF signal via passing through a ground plane is functionally a coaxial transmission line: the via is the center conductor, and the edge of the anti-pad is the outer shield. If the anti-pad is too small, the via has massive parasitic shunt capacitance, lowering its characteristic impedance far below 50 ohms and causing severe high-frequency reflections. RF designers deliberately enlarge the anti-pad to reduce this capacitance and raise the via's impedance back to exactly 50 ohms, ensuring a matched transition.

How do you calculate the correct anti-pad size?

You cannot calculate it accurately with a simple 2D equation, because the capacitance depends on the via drill size, the annular ring sizes on unused layers, the dielectric constant of the substrate, and the specific layer stackup. Rough empirical formulas exist, but professional RF designers always use a 3D electromagnetic simulator (like HFSS or CST). They model the exact via structure, sweep the anti-pad diameter parametrically, and look for the size that yields exactly 50 ohms (or the lowest return loss) at the target operating frequency. Often, removing non-functional pads (annular rings on layers the signal doesn't connect to) allows the use of a slightly smaller anti-pad while maintaining the correct impedance.

Can an anti-pad be too large?

Yes, making the anti-pad too large creates a different set of problems. First, it creates too much inductance, driving the via impedance above 50 ohms. Second, a massive void in the ground plane forces return currents to take long detours around the hole. This adds series inductance to the return path and can cause the ground plane void to act as an unintended slot antenna, radiating RF energy and causing EMI failures. Furthermore, if anti-pads for adjacent vias overlap, they can form large contiguous slots in the plane that severely compromise the board's shielding effectiveness. The anti-pad must be perfectly tuned: large enough to hit 50 ohms, but no larger.

PCB Design

Anti-Pad

When a signal via plunges through a multi-layer PCB, it must pass through internal ground and power planes without touching them. The manufacturer achieves this by etching away a circular void in the copper plane before drilling the hole. This void is the anti-pad. To a digital layout tool, the anti-pad is just a clearance rule to prevent a short circuit. To an RF engineer, the anti-pad is the outer conductor of a vertical coaxial transmission line. If the void is too tight, the via forms a massive parasitic capacitor against the ground plane, crushing the impedance to 20 ohms and reflecting microwave signals backward. By precisely expanding the anti-pad diameter in a 3D EM simulator, the designer reduces the capacitance, tuning the vertical via to a perfect 50 ohms and achieving a reflectionless transition through the board.

Category: PCB Design

Electrical Function: Controls via capacitance

Risk of Over-sizing: Return path disruption

Via Impedance Variables

Physical Feature	Change	Impact on Via Impedance
Anti-Pad Diameter	Increase	Increases Impedance (Lower Capacitance)
Drill / Barrel Diameter	Increase	Decreases Impedance (Higher Capacitance)
Non-Functional Pads	Remove	Increases Impedance (Lower Capacitance)
Substrate Er	Increase	Decreases Impedance (Higher Capacitance)
Ground Stitching Vias	Move Closer	Decreases Impedance (More Coaxial-like)

Coaxial approximation for via impedance:
Z₀ ≈ (60 / √ε_r) · ln(D / d)
Where D is the anti-pad diameter and d is the via barrel diameter.

Parasitic Capacitance (Empirical approximation):
C_via ≈ (1.41 · ε_r · T · D₁) / (D₂ − D₁)
Where T is board thickness, D₁ is the pad diameter, and D₂ is the anti-pad diameter. Note how D₂ in the denominator controls the capacitance.

Common Questions

Frequently Asked Questions

Why do RF boards have larger anti-pads?

Default DRC rules make anti-pads just large enough to prevent manufacturing shorts (e.g., drill diameter + 12 mils). This tight clearance creates high shunt capacitance, lowering the via impedance. RF designers must deliberately enlarge the anti-pads (sometimes 30-40 mils larger) to hit 50 ohms.

Can an anti-pad be too big?

Yes. If you make it too large, the via becomes inductive, driving the impedance above 50 ohms. More importantly, large voids in the ground plane force return currents to take long detours. This adds series inductance and can cause the void to radiate EMI like a slot antenna.

What are non-functional pads?

When a via passes through a 10-layer board but only connects layer 1 to layer 10, the copper annular rings on layers 2-9 are "non-functional pads" (NFPs). RF designers always remove NFPs because they act as parallel capacitor plates against the anti-pad edges, severely degrading the via's high-frequency impedance.

Related Terms

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PCB Engineering

Via Impedance Optimizer

Enter your layer stackup, via diameter, and dielectric properties. Calculate the exact anti-pad diameter required to tune your through-hole via to a perfect 50 ohm impedance.

Calculate Anti-Pad Size