Transmission Line

CPW

/see-pee-double-you/ — Coplanar Waveguide
Center conductor + coplanar grounds (same surface). Z0 = f(W,G,εr). 20-120Ω achievable. εeff = (1+εr)/2. No vias for shunt components. GSG probing standard. Quasi-TEM, low dispersion. Air bridges every λ/4 suppress slotline mode. CBCPW: bottom ground added. Standard for GaAs/InP MMICs and on-wafer test.
Z0: 20-120Ω
Probing: GSG
Mode: quasi-TEM

Understanding CPW

CPW is the transmission line of choice for MMIC (Monolithic Microwave Integrated Circuit) design and on-wafer testing. Its ground-signal-ground topology eliminates the need for substrate vias, which are difficult and expensive to fabricate on thin III-V semiconductor wafers (GaAs, InP). The GSG configuration also matches standard RF probe tips, making CPW the natural choice for wafer-level characterization.

At PCB level, CPW is used in high-speed digital and mmWave designs where via inductance would compromise signal integrity. The key design challenge is suppressing the parasitic slotline mode with periodic air bridges or ground-equalization vias.

CPW Equations

CPW impedance (infinite ground):
Z0 = 30πK(k′)/(K(k)√εeff)
k = w/(w+2s), k′ = √(1−k²)
K = complete elliptic integral

Effective permittivity:
εeff = 1+(εr−1)K(k′)K(k1)/(2K(k)K(k1′))

Planar Transmission Line Comparison

PropertyCPWMicrostripAdvantageNotes
Ground accessTop surfaceBottom onlyCPWEasy shunt
Via needNoneRequiredCPWLower cost
DispersionLowerHigherCPWBetter at mmW
RadiationLowerHigherCPWWith ground
Probe testExcellentDifficultCPWGSSG pads
Common Questions

Frequently Asked Questions

CPW vs microstrip?

No vias: shunt components ground directly (no via inductance). GSG probing: standard for on-wafer. Less dispersion: more uniform εeff vs freq. Substrate-independent Z0. Disadvantages: wider layout (ground planes), air bridges needed to suppress slotline mode, two-ground asymmetry issues at discontinuities.

Impedance?

Z0 set by W/(W+2G) ratio and εr. Elliptic integrals K(k)/K'(k). 50Ω on GaAs: W=70μm, G=45μm. Wider W or narrower G: lower Z0. CBCPW: bottom ground lowers Z0 vs standard CPW. Range 20-120Ω practical. εeff = (1+εr)/2 for thick substrate.

Slotline mode?

CPW supports CPW mode (even, desired) + slotline mode (odd, parasitic). Any asymmetry excites slotline: bends, T-junctions. Causes resonances, radiation, signal loss. Fix: air bridges every λ/4 connecting grounds. MMIC: deposited air bridges. PCB: ground vias. Without suppression: mysterious resonances appear.

MMIC Design

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