Quantum Computing

Chip Layout (Quantum)

/chip lay-owt, kwon-tuhm/
The physical floorplan of a superconducting quantum processor, defining the placement of transmon qubits (4 to 8 GHz), readout resonators (6 to 8 GHz), coupling buses, Purcell filters, and coplanar waveguide (CPW) control lines on a silicon or sapphire substrate. Layout directly determines qubit-qubit crosstalk (target below -60 dB), frequency collision probability, and coherence times. Modern processors with 100+ qubits use heavy-hex or square lattice topologies with qubit spacings of 1 to 2 mm and air-bridge crossovers for signal routing across the chip.
Category: Quantum Computing
Qubit Freq: 4 to 8 GHz
Spacing: 1 to 2 mm

Understanding Chip Layout (Quantum)

Quantum chip layout is fundamentally a microwave engineering problem. Each transmon qubit is a nonlinear LC resonator formed by a Josephson junction (the nonlinear inductance) shunted by a large interdigitated or parallel-plate capacitor (100 to 80 fF), resonating at 4 to 8 GHz with an anharmonicity of 200 to 350 MHz. The qubit's electromagnetic field extends into the surrounding substrate and ground plane, coupling to nearby qubits and resonators. Layout determines the strength and selectivity of these couplings, which must be precisely controlled: nearest-neighbor coupling of 1 to 30 MHz for two-qubit gates, but next-nearest-neighbor coupling below 100 kHz to avoid correlated errors.

The dominant topology for IBM's processors is the heavy-hex lattice, where each qubit connects to at most 2 or 3 neighbors, reducing frequency collision constraints compared to a square lattice (4 neighbors) or fully-connected graphs. Google's Sycamore uses a square lattice with tunable couplers between every pair. In both cases, readout resonators are frequency-multiplexed on shared feedlines, with 8 to 12 resonators per line spaced by 30 to 50 MHz. The feedline-to-resonator coupling quality factor (Qc of 2,000 to 10,000) is set by the gap between the CPW feedline and the resonator, typically 20 to 100 micrometers. Air-bridge crossovers (aluminum or indium) allow control lines to cross over ground plane slots with better than -40 dB isolation, eliminating the parasitic slot-line modes that would otherwise degrade coherence.

Quantum Chip Design Parameters

Transmon Frequency:
f01 ≈ √(8EJEC) / h - EC/h   [Hz]

Coupling Strength (Capacitive):
g = (Cg / √(C1C2)) · √(f1f2) / 2   [Hz]

Readout Dispersive Shift:
χ = g2α / (Δ(Δ - α))   [Hz]

Where EJ = Josephson energy, EC = charging energy, Cg = coupling capacitance, C1,2 = qubit capacitances, α = anharmonicity, Δ = qubit-resonator detuning. Typical values: g/2π = 1 to 30 MHz, χ/2π = 0.5 to 5 MHz.

Layout Topology Comparison

TopologyMax NeighborsFreq Palette SizeQubit SpacingUsed By
Heavy-Hex2 to 38 frequencies1.5 to 2.0 mmIBM (Eagle, Heron)
Square Lattice412+ frequencies1.0 to 1.5 mmGoogle (Sycamore)
Flip-Chip 3D4 to 6Variable0.5 to 1.0 mmIBM (multi-chip)
Linear Chain23 frequencies1.0 to 2.0 mmSmall-scale demos
Common Questions

Frequently Asked Questions

Why does qubit spacing matter in quantum chip layout?

Transmon qubits couple through electromagnetic fields that fall off with distance. Nearest-neighbor coupling of 1 to 30 MHz enables two-qubit gates, but non-neighbor residual coupling (below 100 kHz) causes ZZ crosstalk that limits fidelity. Spacing of 1 to 2 mm balances gate coupling against parasitic crosstalk. Scaling beyond 1,000 qubits on a single 20 mm substrate forces multi-chip architectures with microwave interconnects.

What is a frequency collision in quantum chip layout?

Each transmon has a fixed frequency set by its junction area and capacitance, targeting 4.5 to 5.5 GHz with 200 to 300 MHz anharmonicity. A collision occurs when coupled qubits have transitions within 20 MHz, enabling unwanted energy exchange. Layout tools assign frequencies from a palette (8 distinct values for heavy-hex) and verify no pair hits a two-photon resonance. Fabrication variation of ±50 MHz makes this a probabilistic yield problem.

How are microwave control lines routed on a quantum chip?

Control lines are 50-ohm CPW with 10 μm center conductors on sapphire (εr = 9.3). XY drive lines carry shaped pulses at 4 to 8 GHz for single-qubit gates. Z-bias lines carry DC to 500 MHz flux pulses. Readout feedlines couple to 8 to 12 resonators at distinct frequencies. Air-bridge crossovers achieve better than -40 dB isolation where lines must cross, suppressing parasitic slot-line modes that degrade coherence.

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