Cavity Resonance PDN
Understanding Cavity Resonance PDN
Physical Mechanism and Plate Resonances
In high-speed, multi-layer printed circuit boards (PCBs), power and ground planes are typically placed on adjacent layers separated by a thin dielectric. This sandwich structure acts as a parallel-plate transmission line. When high-frequency current transients are injected into the PDN by switching integrated circuits (ICs), electromagnetic waves propagate outward between the planes. When these waves reach the boundaries or edges of the PCB, they encounter an open circuit, which reflects the energy back into the board.
At specific wavelengths corresponding to the board's dimensions, these reflections form standing waves. The power-ground plane pair behaves exactly as a rectangular or cylindrical resonant cavity. At these cavity resonant frequencies, the input impedance of the PDN spikes to extremely high values (impedance peaks), rendering standard decoupling capacitors ineffective. If an IC switches at or near these frequencies, the power rail experiences large voltage fluctuations (ground bounce and power bounce), threatening signal integrity.
Electromagnetic Radiation and Mitigation
The field concentration at cavity resonance also causes severe electromagnetic interference (EMI) problems. The high-amplitude fields at the board edges behave as slot radiators, leaking electromagnetic energy into the surrounding enclosure and failing regulatory emissions standards. To mitigate cavity resonance, designers employ several techniques:
- Decoupling Array Placement: Placing decoupling capacitors around the perimeter of the board to act as short circuits at high frequencies, reducing reflections.
- Substrate Thickness Reduction: Utilizing very thin dielectric spacers between the power and ground planes, which increases the capacitance and losses, damping the resonance Q-factor.
- Via Fences and Edge Shielding: Installing rows of stitching vias connected to ground along the board boundaries, or using edge plating to contain the fields inside the PCB.
Key Mathematical Relations
Technical Specifications Comparison
| Mitigation Technique | Working Principle | Typical Attenuation | Impact on Routing Space | Main Cost Factor |
|---|---|---|---|---|
| Perimeter Decoupling | Short-circuits the board edges at RF | 10 - 15 dB | Low (uses edge keep-out zone) | Cost of passive components |
| Thin Dielectric Planes | Increases plane capacitance & dielectric damping | 15 - 25 dB | None (improves power distribution) | Premium core material pricing |
| Via Stitching (Fences) | Reflects waves back; shields edges | 12 - 18 dB | Moderate (occupies board edge space) | Negligible (additional drills) |
| Lossy Substrates | Absorbs RF energy; reduces resonance Q | 15 - 30 dB | None | High (specialized materials) |
Frequently Asked Questions
Why are decoupling capacitors ineffective at high cavity resonance frequencies?
Every capacitor has an equivalent series inductance (ESL) and mounting inductance. At gigahertz frequencies, this inductance dominates, causing the capacitor to behave as an open circuit rather than a short circuit, preventing it from damping the plane resonance.
What is the '20-H rule' in PCB layout?
The 20-H rule is a design guideline stating that the power plane should be made smaller than the ground plane by 20 times the dielectric thickness (H). This reduces fringing fields at the board edges, mitigating radiation and resonance issues.
How does via stitching reduce edge radiation?
Stitching vias placed along the board edge with a spacing of less than 1/10th of a wavelength act as a Faraday cage, blocking high-frequency waves from escaping the board edges and radiating into the air.