Castellations
Understanding Castellations
Surface-Mount Module Integration
In modern electronic packaging, modular sub-assemblies, such as Bluetooth chips, Wi-Fi transceivers, and GPS modules, are designed to be soldered directly onto a main parent printed circuit board (PCB). To facilitate this surface-mount attachment without using costly pins, headers, or connectors, designers use castellations. Castellations are plated half-holes located along the edges of the module PCB. When the module is placed on the parent board, these half-holes align with matching pads on the parent board, forming reliable solder joints during reflow soldering.
Castellated holes are created during the PCB fabrication process. Standard plated through-holes are drilled along the board's routing paths. During final routing, the board-cutting tool cuts the board directly through the centers of these holes, leaving plated semi-circles. Specialized board-house processes are required to cut through the copper plating cleanly without peeling it off the hole walls.
RF Advantages and Layout Guidelines
For high-frequency RF modules, castellations offer significant advantages over traditional pin headers. They eliminate the vertical height and long pin lengths of headers, which introduce significant parasitic inductance of approximately 1 to 2 nH per pin. This low parasitic path is critical for RF signal lines to maintain 50-ohm characteristic impedance and prevent signal reflections. Furthermore, castellations provide a dense array of low-inductance ground connections along the perimeter of the module, which is necessary to maintain shielding integrity and prevent electromagnetic interference (EMI).
Key Mathematical Relations
Technical Specifications Comparison
| Mounting Interface | Parasitic Inductance | Profile Height (mm) | Assembly Process | Thermal Dissipation | RF Performance Limit |
|---|---|---|---|---|---|
| Pin Headers (2.54mm pitch) | 1.5 – 3.0 nH | > 5.0 mm | Manual or Wave Solder | Poor | < 1 GHz (severe reflection) |
| Land Grid Array (LGA) | < 0.1 nH | < 0.1 mm | Reflow Solder (stencil required) | Excellent (under-pad grid) | > 40 GHz |
| PCB Castellations | 0.2 – 0.5 nH | Module thickness (1.0 - 1.6mm) | Reflow Solder (edge-hand solderable) | Good (edge thermal vias) | > 10 GHz (design dependent) |
Frequently Asked Questions
What is the primary manufacturing challenge when creating castellated holes?
The primary challenge is preventing the copper plating from peeling or burring during the final board routing. PCB manufacturers use specialized router bits and routing speeds, and sometimes plate the holes with a hard gold finish (ENIG) to protect the metal edges.
Why are castellations preferred for RF transceiver modules?
Castellations are preferred because they allow flat, surface-mount integration with very short solder paths. This minimizes parasitic inductance and capacitance, which is necessary to preserve signal integrity and impedance matching at frequencies above 1 GHz.
What is the recommended surface finish for castellated boards?
Electroless Nickel Immersion Gold (ENIG) is the recommended surface finish. It provides a flat surface, prevents copper oxidation on the exposed half-holes, and offers excellent solderability during reflow assembly.