How does temperature affect transistor breakdown voltage?

In most semiconductors, breakdown voltage has a positive temperature coefficient for avalanche breakdown and a negative coefficient for Zener breakdown. For RF power transistors operating in the avalanche regime, BVds increases by approximately 0.05-0.1%/°C for GaN and LDMOS. This means a GaN device rated at 120 V at 25°C may have 126 V at 150°C channel temperature. However, the increased leakage current at elevated temperatures partially offsets this benefit, and thermal runaway risk increases even though the breakdown voltage itself is slightly higher.

Why do GaN HEMTs have higher breakdown voltage than GaAs?

The breakdown voltage of a semiconductor device scales with the critical electric field of the material raised to a power related to the doping profile. GaN has a critical field of 3.3 MV/cm compared to 0.4 MV/cm for GaAs. For a given gate-drain spacing and doping concentration, this translates to roughly 8× higher BVds. A 0.25 µm GaN HEMT achieves BVds of 80-120 V, while an equivalent GaAs pHEMT achieves only 15-20 V, directly determining the maximum drain bias and achievable output power.

What is Transistor Breakdown Voltage? | BVds & BVceo

Q: What is the difference between BVds and BVdss?

BVds is the drain-source breakdown voltage measured with the gate at a specified bias (typically pinch-off), while BVdss is the drain-source breakdown voltage with the gate shorted to source (Vgs = 0). For depletion-mode FETs like GaN HEMTs, BVdss is measured with the channel fully open and is typically lower than BVds at pinch-off because the channel provides a leakage path. For enhancement-mode devices, BVdss with the channel off equals BVds. Datasheets should be read carefully to determine which condition applies.

Definition & Physics

Breakdown voltage is the maximum voltage that can be applied across the output terminals of a transistor (drain-source for FETs, collector-emitter for BJTs/HBTs) before the electric field in the depletion region reaches the critical value for impact ionization. At this threshold, accelerated carriers generate electron-hole pairs through collisions with the crystal lattice, triggering an avalanche multiplication process that causes a rapid, uncontrolled increase in current.

For RF power transistors, breakdown voltage directly determines the maximum DC supply voltage and, consequently, the maximum RF output power. Since output power scales as V_DD²/(2R_L), a device with twice the breakdown voltage can theoretically deliver four times the output power for the same load impedance. This is why wide-bandgap semiconductors with high critical electric fields (GaN at 3.3 MV/cm, SiC at 2.5 MV/cm) dominate high-power RF applications: their high breakdown voltages allow high supply voltages, which produce more power from smaller devices with higher load impedances that are easier to match.

Key Formulas

Breakdown Voltage (1D approximation):

BV = E_crit² × ε_s / (2 × q × N_d)

where E_crit = critical field, ε_s = permittivity, N_d = doping

Johnson Figure of Merit:

JFM = (E_crit × v_sat) / (2π)

GaN JFM is ~27× silicon, enabling simultaneous high voltage and high frequency

Max Output Power:

P_max = (BV − V_knee)² / (8 × R_opt)

Semiconductor Breakdown Comparison

Technology	BV_ds/BV_ceo	Typical V_DD	E_crit (MV/cm)	P_density (W/mm)	f_max (GHz)
GaN-on-SiC	80-200 V	28-50 V	3.3	5-10	40+
GaN-on-Si	60-100 V	28 V	3.3	3-5	20
LDMOS	65-130 V	28-32 V	0.3	1-2	4
GaAs pHEMT	15-25 V	5-8 V	0.4	0.5-1	40+
InP HBT	8-15 V	4-6 V	0.5	0.4	100+
SiGe HBT	5-12 V	3-5 V	0.3	0.3	50+
Si CMOS	3-7 V	1.2-3.3 V	0.3	0.1	30

Practical Application

When selecting a transistor for a 200 W L-band (1.2 GHz) solid-state radar transmitter, the designer needs sufficient breakdown voltage to handle class-AB operation with 10:1 VSWR ruggedness. A GaN HEMT with BV_ds = 150 V allows operation at V_DD = 50 V with peak voltage of 100 V under matched conditions and 150 V under open-circuit mismatch. The optimum load resistance is R_opt = (50 − 5)² / (2 × 200) = 5.06 Ω, requiring an output matching network with a 10:1 impedance transformation ratio from 50 Ω. An LDMOS alternative with BV_ds = 110 V at V_DD = 32 V would need R_opt = 2.3 Ω, requiring a much wider bandwidth-limiting 22:1 transformation.

Frequently Asked Questions

What is the difference between BVds and BVdss?

BV_ds is measured with the gate at pinch-off bias, while BV_dss has the gate shorted to source (V_gs = 0). For depletion-mode FETs, BV_dss is typically lower because the open channel provides a leakage path. Always check datasheet conditions.

How does temperature affect breakdown voltage?

Avalanche breakdown voltage has a positive temperature coefficient of ~0.05-0.1%/°C. A GaN device rated 120 V at 25°C may reach 126 V at 150°C. However, increased leakage current at temperature partially offsets this benefit and thermal runaway risk increases.

Why do GaN HEMTs have higher BV than GaAs?

GaN's critical field (3.3 MV/cm vs 0.4 MV/cm) from its wider bandgap (3.4 eV vs 1.42 eV) yields ~8× higher BV_ds at equivalent geometry. A 0.25 µm GaN HEMT achieves 80-120 V vs 15-20 V for GaAs.

Breakdown Voltage (Transistor)