Signal Processing

Block Interleaver

A Block Interleaver rearranges coded bits by writing them into an R×C matrix row-by-row and reading them out column-by-column, spreading consecutive bits across R different positions in the output stream. A burst error of up to C consecutive bits is distributed as single errors across R different codewords, enabling the FEC decoder to correct each one independently. The latency is R×C bits.
Category: Signal Processing
Latency: R×C bits

Understanding Block Interleavers

Consider R=4 rows, C=6 columns. Bits 1-6 fill row 1, bits 7-12 fill row 2, etc. Reading column-by-column: bits 1,7,13,19,2,8,14,20,... A burst of 6 consecutive errors in the transmitted stream affects one bit in each of 6 different rows, spreading the burst across 6 codewords. If each codeword's FEC can correct 1 error, the burst is fully recoverable.

The deinterleaver at the receiver performs the inverse operation (write column-by-column, read row-by-row), restoring original order with the burst errors now scattered.

Block Interleaver Parameters
Matrix: R rows × C columns
Write: row-by-row (R codewords of C bits)
Read: column-by-column

Burst protection: up to C bits
Latency: R × C / bit_rate
Memory: R × C bits

Interleaver Type Comparison

TypeLatencyMemoryBurst ProtectionUsed In
BlockR×CR×CC bitsLTE, GSM
ConvolutionalR×C/2R×C/2C bitsDVB-T, DAB
RandomBlock lengthBlockStatisticalTurbo codes
S-RandomBlock lengthBlockGuaranteed SLTE Turbo
Common Questions

Frequently Asked Questions

Why interleave?

FEC corrects random errors. Bursts overwhelm FEC. Interleaving spreads bursts across codewords so each sees only random errors.

Block vs convolutional?

Block: R×C matrix, full latency. Convolutional: shift registers, half latency. Convolutional starts output sooner.

How deep?

Depth > expected burst length. 5 ms fade at 1 Mbps = 5,000 bit burst. Need R×C > 5,000. Balance protection vs latency.

Coding Solutions

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