Automatic Fixture Removal (AFR)
Understanding Automatic Fixture Removal
When measuring a tiny SMD filter or an MMIC amplifier die, you cannot connect a VNA cable directly to the component. Instead, the DUT is soldered to a test fixture, a small PCB with coaxial connectors (typically SMA or 2.92mm) that transition to microstrip traces leading to the DUT's pads. The problem is that this fixture has its own insertion loss, return loss, and phase delay. The VNA measurement includes both the fixture and the DUT, tangled together.
AFR separates them. The result is a clean set of S-parameters that represent only the DUT, as if you could magically connect the VNA reference planes directly to the component's terminals.
Method 1: Time-Domain Gating
The VNA's time-domain transform converts the frequency-domain S-parameters into a time-domain impulse response. In time domain, the fixture's connector reflection, the fixture-to-DUT transition, and the DUT itself appear as separate peaks at different time positions. By applying a time gate (a rectangular or Kaiser-Bessel window) that includes only the DUT's reflection, the fixture effects are excluded. The gated time-domain data is then transformed back to frequency domain.
Method 2: 2x Thru De-embedding
A "2x Thru" standard is a test fixture identical to the DUT fixture, but with the DUT replaced by a direct thru connection (the two fixture halves soldered back-to-back). The VNA measures the 2x Thru, and the AFR algorithm mathematically bisects it to extract the S-parameters of a single fixture half. These fixture S-parameters are then de-embedded (matrix-divided) from the DUT measurement.
[TDUT] = [Tfixture_A]-1 × [Tmeasured] × [Tfixture_B]-1
Where:
[Tmeasured] = Total measured T-parameters (fixture + DUT + fixture)
[Tfixture_A] = Left fixture half (from 2x Thru bisection)
[Tfixture_B] = Right fixture half
[TDUT] = De-embedded DUT T-parameters (convert back to S-parameters)
When to Use Which Method
| Method | Requires | Accuracy | Best For |
|---|---|---|---|
| Time-Domain Gating | Sufficient fixture electrical length (>100 ps) | Good (limited by gate resolution) | Quick measurements, no calibration fixture available |
| 2x Thru De-embedding | Matched 2x Thru fixture | Excellent (full matrix removal) | Production testing, high-accuracy characterization |
| Port Extension | Known fixture delay only | Fair (removes delay, not mismatch) | Simple cable length compensation |
Frequently Asked Questions
Why can't I just calibrate at the cable ends?
Standard coaxial calibration moves the reference plane to the cable tips, but the DUT is soldered to a PCB test fixture with SMA launch connectors, microstrip traces, and possibly wire bonds. These fixture elements add their own insertion loss, impedance mismatches, and phase shifts. AFR mathematically removes the fixture so you see only the DUT's true S-parameters.
What is the difference between AFR and TRL calibration?
TRL (Thru-Reflect-Line) calibration requires fabricating three separate calibration standards on the same substrate as your DUT. AFR requires only a single thru connection or, in some implementations, no calibration standards at all (using time-domain gating). TRL is more accurate when calibration standards are available, but AFR is faster and preferred for high-volume production testing.
How accurate is time-domain gating for fixture removal?
Accuracy depends on the frequency span (which determines time resolution) and the electrical length separation between fixture and DUT. The fixture must be at least 100 picoseconds (about 15 mm of microstrip) longer than the time-domain resolution. For a VNA measuring to 40 GHz, the time resolution is about 25 ps, so the fixture trace must be at least 125 ps long for clean gating.